Image Title Series Editor Year Availability
System Level Design Model with Reuse of System IP System Level Design Model with Reuse of System IP Cavalloro, P.; Gendarme, C.; Kronlöf, K.; Mermet, J.; Van Sas, J.; Tiensyrjä, K.; Voros, N. 2003, 220 p., Hardcover Now
Platform Based Design at the Electronic System Level Platform Based Design at the Electronic System Level, Industry Perspectives and Experiences Burton, Mark; Morawiec, Adam 2006, X, 100 p., Hardcover Now
System-on-Chip Methodologies & Design Languages System-on-Chip Methodologies & Design Languages Ashenden, Peter J.; Mermet, J.; Seepold, Ralf 2001, 352 p., Hardcover Now
System on Chip Design Languages System on Chip Design Languages Mignotte, Anne; Villar, Eugenio; Horobin, Lynn 2002, 296 p., Hardcover Now
System Specification and Design Languages System Specification and Design Languages Villar, Eugenio; Mermet, J. 2003, 350 p., Hardcover Now
Languages for System Specification Languages for System Specification Grimm, Christoph 2004, 367 p., Hardcover Now
Design and Specification Languages for SoCs Advances in Design and Specification Languages for SoCs Boulet, Pierre 2005, X, 305 p., Hardcover Now
Applications of Specification and Design Languages for SoCs Applications of Specification and Design Languages for SoCs Vachoux, A. 2006, XXII, 312 p., Hardcover Now
Advances in Design and Specification Languages for Embedded Systems Advances in Design and Specification Languages for Embedded Systems Huss, Sorin Alexander 2007, X, 358 p., Hardcover Now
High-Level Synthesis from Algorithm to Digital Circuit High-Level Synthesis from Algorithm to Digital Circuit V1 Coussy, Philippe; Morawiec, Adam 2008, XVI, 300 p., Hardcover Now